Verification and Validation of Multi-Core System Architectures

IEEE Space Mission Challenges for Information Technology - IEEE Space Computing Conference
Computer History Museum  •  Mountain View, CA, USA  •  15-19 July 2024

Summary

The "Verification and Validation of Multi-Core System Architectures" Workshop is a one-day in-person seminar within the 2024 IEEE Space Computing Conference(SCC), featuring invited presentations and interactive discussions on best practices for verifying and validating software on a multi-core platform.

The workshop focuses on the transition to multi-core architectures in space flight applications and the resulting implications to a system designer or system integrator’s ability to assess the safety and performance of the architecture under all conditions. It also includes discussion of approaches, engineering methodologies, and tools to enable space flight certification of these systems.

The workshop will be chaired by Vivek Reddy (NASA/JPL, Flight Software Group Supervisor), Alwyn Goodloe (NASA Langley Research Center, Research Computer Engineer), Scott Tashakkor(NASA/MSFC, NESC Deputy Software Tech Fellow), and Kenneth Costello (NASA IVV, Advanced Engineering Insight Lead).

The workshoop format will include invited presentation and interactive challenge problems to support discussion amongst audience members


Speakers

Dionisio de Niz is a Principal Researcher at the Software Engineering Institute at Carnegie Mellon University. He received an M.S. in information networking from the Information Networking Institute and a Ph.D. in electrical and computer engineering from Carnegie Mellon University. His research interests include cyber-physical systems, real-time systems, and model-based engineering. In the real-time arena he has recently focused on multicore processors and mixed-criticality scheduling, and has led a number of projects on both fundamental research and applied research for the private industry and government organizations

Thea-Martine Gauthier is the software architect for the HPSC platform. Additional TBD Description here.

TBD Speaker


Schedule

TIME (PDT) TITLE PRESENTER
10:30 AM Introduction Workshop Chairs
10:45 AM Speaker Presentation 1 Thea-Martine Gauthier
11:30 AM Interactive Challenge #1
12:00 PM Lunch Break
1:15 PM Speaker Presentation 2 Dionisio De Niz
2:00 PM Interactive Challenge #1 Re-Visit
2:30 PM Interactive Challenge #2
3:15 PM Coffee Break
3:45 PM Speaker Presentation 3 TBD
4:30 PM Interactive Challenges Re-Visit

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